Traditional superheterodyne receivers translate incoming radio signals to one or more intermediate frequencies where successive stages of amplification, baseband filtering and gain control are applied. Direct conversion architecture uses a single mixer with a single oscillator tuned to the desired signal frequency, converting a signal directly to baseband-the zero intermediate frequency "ZIF" signal. Direct conversion receivers have been gaining in popularity in the electronic communications environment.
DC offset correction is one of the most critical problems in the design of direct conversion receivers. FIG. 1 is a block diagram of a conventional DC offset correction loop 100 such as would be used in the baseband path of a direct conversion receiver, cell phone, or other communication device. Correction loop 100 is shown coupled to a mixer 102 and generally includes a summer 104, a baseband filter 106, an attenuator 108, an integrator 110, and an operational transconductance amplifier (OTA) 112. In operation, mixer 102 receives a radio frequency (RF) signal 114 and a second radio signal, such as a local oscillator (LO) signal. The output of the mixer is a zero IF (ZIF) signal which gets corrected by adding or subtracting it with a feedback signal 116 to produce a baseband signal 118. The baseband signal 118 is filtered through the baseband filter 106 to produce an I and Q output signal 120. The I and Q output signal 120 is attenuated through attenuator 108, and the attenuated signal 122 is then integrated through integrator 110 to produce the feedback signal 124 (Ioffset, Qoffset). The output of the correction loop 100 is taken at the output of the baseband filter 120.
Mismatches between devices in a direct conversion radio system create DC offset in the down mixer and baseband filter. This offset can introduce tremendous distortion in the FM demodulation and even make the baseband filter nonfunctional. In the analog-to-digital conversion processes that occur in digital circuits, the DC offset is converted to a digital input along with I/Q data. During the A/D conversion process the offsets can also saturate the A/D converters.
Slow varying offsets create even more difficulties for DC offset correction. Traditionally, the integrator 110 has included a programmable time constant that is used to remove DC offsets after baseband filtering. However, since the integrator 110 has an infinite gain at DC, the delay introduced is so long that DC estimations cannot quickly follow the actual slow varying DC. As a consequence, the demodulated signal is severely distorted.
Other approaches to DC offset correction include quantization schemes and least mean square (LMS) techniques. However, these methods tend to require heavy computational steps in order to achieve any significant improvement in performance reduction in the DC offset.
Accordingly, there is a need for an improved method and apparatus for correcting DC offsets, particularly those offsets which occur in zero IF and direct conversion receivers.